Independent research and development of the technology of adaptive clock system built-in 4-way independent low jitter audio crystals,for USB part configuration FeiMiaoJi local clock system (CCHD customised version-575);
High performance mixed-signal PLL,excellent clock synchronization recovery technique,can be significantly filtering external digital input jitter secondary PLL;
Source synchronization technology and FPGA shaping technology,the I2S signal reconstruction after isolation,thereby eliminating the additive isolation chip by shaking;
Original input channel more isolation technique,which guarantees each input signal is the purity of all the way.
Input interface to support the sampling rate:
(USB and I2S support all sampling rate,S/PDIF support up to 192 KHZ)
DSD: 2.8 MHz (DSD64) - DoP,native
5.6 MHz (DSD128) - DoP,native
11.2 MHz (DSD256) - DoP,native
22.5792 MHz (DSD512) - native
(USB and I2S support all DSD format,S/PDIF and AES/EBU support the DSD64 DOP model)
The highest 24bit over S/PDIF
Each interface electrical standards:
USB input socket for standard USB-type B mother,USB power supply range is 4.5V-5.1V;
SPDIF standard S/PDIF interface input signal,the input impedance of 75 ohms,AES,the input impedance of 110ohms;
Is 115V/230C ac power input,internal adopts TALEMA import transformer for power supply;
I2S input for the HDMI interface in the form of an LVDS level,compatible with SU -1 interface
Analog output performance:
Output level (0dBFS):
PCM:RCA single-ended output is 2V RMS,XLR output is 4V RMS
DSD:RCA single-ended output is 1.34V RMS,XLR output is 2.68V RMS
Output impedance:22ohm(RCA single-ended) / 45ohm(XLR balanced)
Frequency response:20-20kHz +/-0.1dB
THD+N (1kHz, 0dBFS) 0.00042% at fs=44.1Khz(PCM)
THD+N (1kHz, 0dBFS) 0.00029% at DSD128
Dynamic response:(1kHz, -60dBFS) 118dB
Left and right channel separating degree:>120dB
Windows 7,Windows 8，Windows 10; 32/64 bit,need to install the driver
Native MacOS 10.6 and later,Use system drive
Native Linux with UAC2 compliant kernel,Use system drive
Android OS 4.2 and above,the need to support OTG function devices,in general,Android 5.0 system is supported by default,5.0 the following recommended to use special player.
I2S interface using HDMI socket input:
Level of 3.3V an LVDS difference signal;
I2S interface compatible with several I2S output signal definition,FPGA with built-in PCM/DSD signal automatic recognition algorithm;
DSD can also define your own ON signal,DSD ON this signal can be arbitrary input into the socket PIN 13,14,15,16pin.
PIN1-3 and PIN7-9 phase is adjustable,the user can through a switch configuration of the two phase of the output.
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